The invention uses various materials which are electrically either conductive, insulative or semiconductive, although the completed semiconductor circuit device itself is usually referred to as a "semiconductor", generally made of silicon and related materials.
In the operation of certain semiconductor circuit devices, such as DRAMs, a sense amp detects and amplifies a very small charge or the absence thereof in a memory cell. For example, a charged memory cell is discharged, via an activated WORD line, to a DIGIT line (refer to FIG. 1). DIGIT and its corresponding DIGIT* line are initially equilibrated to voltage VEQ (which may be approximately VCC or VCC/2), and each connect to opposite sides of the sense amp. A common node of the sense amp transistors is also initialized to VEQ. This cell-to-DIGIT discharge slightly raises DIGIT voltage to VEQ + dV, while DIGIT* remains at VEQ, causing voltage difference dV between DIGIT and DIGIT*. Within the sense amp is a pulldown device that turns on the sense amp by pulling down the common node to VREF. In this example, with DIGIT higher than DIGIT*, the sense amp transistor gated by DIGIT will turn on faster than the sense amp transistor gated by DIGIT* as the common node is pulled down. The transistor gated by DIGIT pulls DIGIT* from VEQ to VREF, while DIGIT remains at approximately VEQ + dV.
Similarly, if the memory cell initially has nr charge, the DIGIT-to-cell discharge slightly decreases DIGIT to VEQ - dV, while DIGIT* remains at VEQ. In this case, when the sense amp is turned on, DIGIT is pulled down to VREF while DIGIT* remains approximately at VEQ.
In both cases above, a very small voltage difference dV between DIGIT and DIGIT* is sensed and amplified by the sense amplifier. After this sense operation, DIGIT and DIGIT* can easily drive less sensitive circuitry. Also in both cases, actual turn-on of the sense amp occurs when the common node is approximately one VT (transistor threshold voltage) below DIGIT or DIGIT* (whichever is highest).
High speed is desirable in such a device, because the sense amp pulldown time controls the time required to read a memory cell, consequently controlling the access speed of the DRAM. This speed can be increased by pulling down the common node very quickly. However, a problem arises if the pulldown is too quick, because capacitive coupling between the sources and drains of the sense amp transistors tends to pull both DIGIT and DIGIT* down before the common node is pulled down low enough to turn on one of the transistors. In this case, as the sense amp transistor finally turns on, it shorts out its capacitive coupling and bounces DIGIT and DIGIT*. This noise is undesirable.
One way to quickly pull down the common node while avoiding this noise is to slowly pull down the common node until one of the sense amp transistors turns on, then quickly pull down the common node the rest of the way. One well known combination (shown in FIG. 2) is two sequentially clocked pulldown transistors on the common node. The first pulldown transistor clocked has a low gain, thereby providing a slow pulldown on the common node (see FIG. 4, time T1). The second pulldown transistor clocked has a high gain, quickly pulling down the common node the rest of the way FIG. 4, time T3).
It is desirable to perform this type of pulldown using only one pulldown transistor and clock instead of two.